Jump to content

Pad cratering

From Wikipedia, the free encyclopedia
The printable version is no longer supported and may have rendering errors. Please update your browser bookmarks and please use the default browser print function instead.

Pad cratering is a mechanically induced fracture in the resin between copper foil and outermost layer of fiberglass of a printed circuit board (PCB). It may be within the resin or at the resin to fiberglass interface.

The pad remains connected to the component (usually a Ball Grid Array, BGA) and leaves a "crater" on the surface of the printed circuit board.

Overview

Pad cratering most often occurs during dynamic mechanical events such as mechanical shock or board flexure due to In-circuit test (ICT), board depaneling, or connector insertion.[1] However, pad cratering has also been known to occur during thermal shock or even thermal cycling. Susceptibility to pad cratering can be impacted by several factors such as: PCB thickness, PCB laminate material properties, component size and stiffness, component location, and solder alloy selection among other factors.[2][3][4]

Testing

IPC-9708 provides three test methods to characterize the pad cratering of a component and PCBA: pin pull, ball pull, and ball shear testing.[5] In the pin pull test a pin is soldered to pads and pulled until fracture. It is a useful test for all pad geometries and is sensitive to board design and materials. The ball pull test is specifically design for BGA components and has a large sensitivity to the solder alloy and joint formation. The ball shear test is also specified for BGA components and involves shearing the solder balls of the BGA. This test is typically the most convenient but is less sensitive to the design and material as compared to the ball pull test.[6] Although IPC-9708 specifies procedures for each test type, the challenge is that no standard pass/fail criteria are defined. This is viewed as application-specific and must be defined by the user based on their design, environment, and reliability requirements.

Another applicable test method is IPC/JEDEC-9702, which is a monotonic bend test method used to characterize board level interconnects.[7] This can be relevant for pad cratering resulting from board flexure, however this test method is broader and does not specifically focus on pad cratering failure modes.

Board level reliability testing is a common approach to assessing product reliability. Performing temperature cycling, mechanical drop/shock, and vibration testing is a good way to evaluate pad cratering. However, similar to IPC/JEDEC-9702, this can be cost and time intensive and does not specifically focus on pad cratering failure modes.[8]

Detection and Failure Analysis

Pad cratering can be difficult to detect during functional testing. This is especially the case with small or partial cracking that can escape testing and cause latent field failures.[9] Even if a component failure is identified, diagnosing the failure mode as pad cratering can be difficult. Conventional nondestructive testing and failure analysis techniques such as visual inspection and X-Ray microscopy may not detect the issue. Electrical characterization is an example of a nondestructive technique that can be useful, however this may not detect an anomaly if there is only partial cracking.

Typically, pad cratering is detected or confirmed via destructive testing and failure analysis such as dye and pry, acoustic emissions,[10] cross sectioning, and Scanning Electron Microscopy.

Mitigation

There are several mitigation techniques that can used to reduce the risk of pad cratering. The appropriate method(s) is often driven by design and resource constraints.

Limiting Board Flexure: If cratering is due to mechanical overstress then limiting board flexure is typically the best mitigation technique.[1][9][4]

Simulation: Modeling and simulation can help proactively avoid pad cratering failures.[1][6] Relevant examples include ICT failures or products with potential for large shock events (i.e. portable electronics). Finite Element Analysis can be done using a physics of failure approach to determine risk of overstress and pad cratering. This proactive approach can rapidly evaluate multiple designs early on, potentially avoiding expensive design changes or warranty costs later on.

Underfill, Edge Bonding, and Corner Staking: Epoxies and underfill materials can be added to provide mechanical support and reduce board and solder strain during flexing. This is more common in cases where the component selection and PCBA design are fixed. There are differences between each technique which makes proper understanding of the environment and application important.[4]

Solder Alloy: Solder alloy selection can impact susceptibility to pad cratering. Typically, pad cratering is considered a high strain rate event with minimal creep, however there is still potential for plasticity in the solder. More compliant solders or those with lower yield points will reduce pad cratering potential by providing additional load sharing.

Board Thickness and Laminate Material: Board thickness and laminate material properties such as Young's modulus and Coefficient of Thermal Expansion (CTE) will impact susceptibility to pad cratering.

Board Redesign: If pad cratering persists then a redesign may be required. This could include changing component location or adjusting between solder mask defined (SMD) and non-solder mask defined (NSMD) pads.

Pad Cratering Images

Additional information on pad cratering in printed circuit boards can be found in the following links:

References

  1. ^ a b c http://www.dfrsolutions.com/hubfs/Resources/services/Preventing-Pad-Cratering-During-ICT-Using-Sherlock.pdf?hsCtaTracking=95bec082-e4c1-40d3-a379-dfe6d7a5727a%7Ce96e5f51-abc5-4c7a-9a2e-28a78cb24e8e [bare URL PDF]
  2. ^ https://www.smtnet.com/library/files/upload/pad-cratering.pdf, PAD CRATERING: THE INVISIBLE THREAT TO THE ELECTRONICS INDUSTRY, Presented by Jim Griffin, OEM Sales & Marketing Manage, Integral Technology
  3. ^ http://www.circuitinsight.com/pdf/test_method_pad_cratering_ipc.pdf, M. Ahmad, J. Burlingame, and C. Guirguis, Validated Test Method to Characterize and Quantify Pad Cratering Under BGA Pads on Printed Circuit Boards, Apex 2008.
  4. ^ a b c https://www.smta.org/chapters/files/uppermidwest_padcratering.pdf [bare URL PDF]
  5. ^ IPC IPC-9708, Test Methods for Characterization of PCB Pad Cratering
  6. ^ a b D. Xie, D. Shangguan and H. Kroener, "Pad Cratering Evaluation of PCB", APEX 2010, Las Vegas, NA.
  7. ^ IPC/JEDEC-9702: Monotonic Bend Characterization of Board-Level Interconnects
  8. ^ Pad Cratering: Assessing Long Term Reliability Risks, Denis Barbini, Ph.D., AREA Consortium, http://www.meptec.org/Resources/23%20-%20Universal%20Instruments.pdf
  9. ^ a b http://www.dfrsolutions.com/hubfs/Webinar%20Slides%20for%20YouTube/Avoiding-Pad-Cratering-and-Cracked-Capacitor-Webinar.pdf [bare URL PDF]
  10. ^ Bansal, A.; Ramakrishna, G.; Liu, K. (2011). "A New Approach for Early Detection of PCB Pad Cratering Failures" (PDF). Circuit Insight. S2CID 18338793.